Simple 100MHz frequency counter

It is quite simple to turn a midrange PIC microcontroller into a frequency counter. The inputs are specified up to 50MHz, which can be stretched by adding a prescaler. I happened to have some 74AS74 flipflops, which go up to more than 100MHz, which becomes therefore the de-facto maximum frequency of my version.

The image above shows the prototype, counting the frequency of the 24MHz crystal oscillator that can vaguely be seen in the background.
The Eagle files and C-source file can be found in this zip file.

The PIC 16F628 has an instruction clock of up to 5MHz, which is also the input sampling rate. For TMR0 the pin RA4 can be used as a counter input. The configurable prescaling happens to be done before the sampling, and therefore the full 50MHz can be used. A little software trick is needed to be able to read the count value in the prescaler: in case of a 1:256 ratio a full byte of accuracy is held within.

The counter is started and stopped by making pin RA3 high or low. This pin is connected to the CLR input of the final flipflop. The software in the PIC will count TMR0 overflows. together with the TMR0 register itself and the value held by the prescaler this results in a total of 24bits of counter value. The actual accuracy is only limited by the PIC clock itself, i.e. the accuracy of the counting interval. This could be tuned in SW, for example by insertion of NOP instructions.

The circuit itself is fairly simple. PORT B of the PIC is used to drive 7 segments and a dot. The difits themselves are multiplexed by means of a 4051 1to8 demux, which is controlled with pins RA0-2. So the lower 3 bits of PORT A select the digit and PORT B sets the value. My Kingbright displays were common cathode, so the X input of the 4051 is connected to ground. For common anode displays this can be Vcc instead, and the digit encoding must be changed accordingly.

The input signal is buffered by the J310, and shifted to a level that is accepted by the 74AS74. The flipflop itself divides the signal by 4, so the counting interval must be 4 times as long to obtain the right value. I chose 40msec to get a 100MHz maximum frequency with a least significant digit of 100Hz. The software could also be auto scaling, and then the counting is split up in a scaling part of 4msec and then a counting interval which depends on the determined scale. A least significant digit of 1Hz would require an interval of 4sec.

The Eagle PCB design could be manufactured by a protofacility, such as BatchPCB. The prototype shown is built on a stack of two breadboards.